Hi, I need to connect the mac module to a packet telemetry encoder. I simulated (and studied!) the testbench tb_ethernet_with_cop.v, but I didn't understand how it stores the data in the memory in order to transmit a frame: from the verilog code is clear that it initializes the TX buffer descriptors, it sets the Moder register and the memory locations in which the data are stored... ...but I don't see from the code when it writes the data from the host through the wishbone interface into the memory! can you please help me? Thanks, Roberta -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/ethmac/attachments/20080721/e5080e4c/attachment.htm